| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce an access time without being influenced by a wiring resistance of a word line, by making a memory cell field effect transistor pull a current from a selected bit line by means of a selecting means for a first period and a second period. SOLUTION: A memory apparatus having a gate-grounded type memory sense amplifier comprises N-channel transistors T1-T12, P-channel transistors T21-T25, inverters I1, I2, a selector SL, a memory block MB, etc. The N-channel transistor T1 changes a potential of a node N1 in accordance with a size of a current to be pulled out from a node S of a gate-grounded amplifier type. The inverter I1 outputs 'L' or 'H' to a node 2 depending on whether the potential of the node N1 is larger than a predetermined value or not. The inverter I2, P-channel transistor T22 precharges one of bit lines B0-B3.</p> |
