发明名称 SEMICONDUCTOR MEMORY APPARATUS AND NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS AND DATA READ METHOD THEREOF
摘要 <p>PROBLEM TO BE SOLVED: To prevent generation of noises between data lines via a parasitic capacity at the data lines, thereby eliminating wrong read, by changing a switching element set between a sense amplifier and the data line from an on state to an off state after transmitting a potential of the data line to the sense amplifier, and supplying an operation voltage to the sense amplifier. SOLUTION: At the data write time, a negative voltage, e.g. approximately -10V is impressed to a word line to which a memory cell to be selected is connected, and at the same time, a data line DL corresponding to the memory cell to be selected is turned to a potential, e.g. approximately 4 V. Furthermore, a selection switch MOSFETQs1 on a local drain line LDL connected to the selection memory cell is turned on. Approximately 4 V is consequently impressed to a drain. At this time, a selection switch MOSFETQs2 on a local source line LSL is kept off.</p>
申请公布号 JPH10334681(A) 申请公布日期 1998.12.18
申请号 JP19980085457 申请日期 1998.03.31
申请人 HITACHI LTD 发明人 SAKAMOTO YOSHINORI;ISHII TATSUYA;NOZOE ATSUSHI;MIWA HITOSHI;OSHIMA KAZUYOSHI
分类号 G11C16/02;G11C16/06;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/06;H01L21/824 主分类号 G11C16/02
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