发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT FOR VERIFICATION, CIRCUIT SIMULATOR, AND CIRCUIT SIMULATION METHOD
摘要 <p>A large scale integrated circuit for verification is characterized by a plurality of circuit cell blocks laid out on a semiconductor chip, and a variable wiring member which enables programmable connection between the circuit cell blocks, each of the circuit cell blocks including an A/D converting circuit for converting an analog input signal to a digital signal, a signal processing circuit for forming and outputting a desired output value based on the converted signal, and a D/A converting circuit for converting the output value from the signal processing circuit to an analog signal and outputting the analog signal. Thus, a hardware simulator which enables verification of a semiconductor intergrated circuit having an internal analog circuit in a short period of time is realized.</p>
申请公布号 WO1998057282(P1) 申请公布日期 1998.12.17
申请号 JP1998000104 申请日期 1998.01.14
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