发明名称 METHOD OF EVALUATING SEMICONDUCTOR LAYER, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND STORAGE MEDIUM
摘要 An evaluating method capable of nondestructively measuring the thickness of a semiconductor region with disturbed crystallinity and the degree of disturbance of crystallinity when the semiconductor region is implanted with a high-concentration impurity ions. Specifically, a method of evaluating a semiconductor layer comprising the steps of: applying inspection light, which was linearly polarized from a Xe light source (20) by a polarizer (21), obliquely onto a region of a silicon substrate (11) where crystallinity is disturbed by implanting impurity ions; measuring spectra of cos DELTA and tan psi produced by a change in inspection light, where DELTA is a phase difference between a p-direction component and an s-direction component of the elliptically polarized, reflected light and psi is a ratio of amplitudes of these components; and evaluating the thickness of an amorphous region and the degree of disturbance of crystallinity by relating a pattern of spectra such as cos DELTA to the thickness of the amorphous region beforehand as by destructive inspections, or by highlighting characteristic parts of the pattern such as cos DELTA . Because a change in the thickness of the amorphous region can be detected from a change in cos DELTA before and after the heat treatment, it is possible to determine the temperature of the heat treatment from the thickness change.
申请公布号 WO9857146(A1) 申请公布日期 1998.12.17
申请号 WO1998JP02567 申请日期 1998.06.10
申请人 MATSUSHITA ELECTRONICS CORPORATION;NANBU, YUKO;SHIBATA, SATOSHI 发明人 NANBU, YUKO;SHIBATA, SATOSHI
分类号 G01N21/21;H01L21/66;(IPC1-7):G01N21/21;H01L21/477 主分类号 G01N21/21
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