发明名称 Calculating 2A+ sign(A) in a single instruction cycle
摘要 The expression 2A+sign(A), where A is a signed binary integer represented in 2's complement form, sign(A) is equal to one when A is greater than zero, sign(A) is equal to zero when A is zero, and sign(A) is equal to negative one when A is less than zero, is calculated by bit-complementing A, bit-complementing (A+A+2) when A is less than zero, bit-complementing (+E,ovs A+EE ++E,ovs A+EE +1) when A is equal to zero, and bit-complementing all bits except a least significant bit of (+E,ovs A+EE ++E,ovs A+EE +1) when A is greater than zero. Zero detect for A is provided by determining whether a first carry-out bit from (+E,ovs A+EE ++E,ovs A+EE +1) and a second carry-out bit from (+E,ovs A+EE ++E,ovs A+EE +2) have different logical values. In this manner, 2A+sign(A) can be calculated by a general purpose computer in a single instruction cycle.
申请公布号 US5850347(A) 申请公布日期 1998.12.15
申请号 US19960719187 申请日期 1996.09.24
申请人 SAMSUNG SEMICONDUCTOR, INC. 发明人 WONG, RONEY S.
分类号 G06F7/544;(IPC1-7):G06F7/50 主分类号 G06F7/544
代理机构 代理人
主权项
地址