发明名称 |
Dynamic semiconductor memory device on SOI substrate |
摘要 |
In a dynamic semiconductor memory device including a thin film SOI/MOSFET having a semiconductor layer on an insulator as an active region, an "L" level potential of a memory cell transistor, which connects/disconnects a capacitor for storing data as electric charges and a bit line for reading/writing data, is set at a fixed value higher than a ground potential and lower than a power supply potential, and a substrate bias is set at the ground potential. Even if isolation is carried out by LOCOS, sub-threshold leakage current due to a parasitic MOS in the vicinity of LOCOS edge can be suppressed because the potential of a word line is lower than that of the bit line when the memory cell transistor is in a cut-off state. Therefore, a dynamic semiconductor memory device including a thin film SOI/MOSFET which is immune to disturbing refresh can be achieved.
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申请公布号 |
US5850090(A) |
申请公布日期 |
1998.12.15 |
申请号 |
US19960744677 |
申请日期 |
1996.11.06 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OASHI, TOSHIYUKI;EIMORI, TAKAHISA |
分类号 |
H01L27/108;(IPC1-7):H01L29/78 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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