发明名称 |
Static type semiconductor memory with latch circuit amplifying read data read on a sub bit line pair and transferring the amplified read data to a main bit line pair and operation method thereof |
摘要 |
A static type semiconductor memory device includes a main bit line pair, and a plurality of memory blocks connected to the main bit line pair. Each of the memory blocks includes a local bit line pair, a static memory connected to the local bit line pair, an amplifier which amplifies potential difference between the paired local bit lines, and a data transfer gate which transfers data between the local bit line pair and the main bit line pair.
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申请公布号 |
US5850367(A) |
申请公布日期 |
1998.12.15 |
申请号 |
US19970815986 |
申请日期 |
1997.03.10 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
WADA, TOMOHISA;HARAGUCHI, YOSHIYUKI |
分类号 |
G11C11/41;G11C11/419;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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