| 摘要 |
<p>An arithmetic device provided with an input register (101) for storing digital data inputted from outside as P-bit digital data, an output register (107) for storing Q-bit digital data, and an output bit selecting means (105) which selects bits to be outputted from the bits of the P-bit digital data (102) outputted from the input register (101) as first input data and Q-bit digital data (103) outputted from the output register (107) as second input data according to control data (104) inputted from outside an outputs Q-bit digital data (106) comprising the selected bits to the output register (107). This device is suitably used in an image processing system to perform code multiplexing or code separation at high speed.</p> |
