发明名称 |
Memory circuit with dynamic redundancy |
摘要 |
The integrated memory circuit has a matrix of identical memory cells (2) which can be individually addressed in at least one direction. Each cell has a corresponding redundant element that can be addressed in the same direction. Each cell has associated a circuit (20) to reversibly inhibit its operation if it is faulty, and to allow the redundant cell to be activated to preserve the correct operation of the entire circuit. The memory addressing circuits can be reversibly modified to allow access to the replacement cell as if it were the memory cell it replaced.
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申请公布号 |
FR2764095(A1) |
申请公布日期 |
1998.12.04 |
申请号 |
FR19970006902 |
申请日期 |
1997.05.30 |
申请人 |
SGS THOMSON MICROELECTRONICS SA |
发明人 |
FERRANT RICHARD |
分类号 |
G11C29/00;(IPC1-7):G06F11/20 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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