发明名称 PSEUDO-RANDOM NUMBER GENERATING DEVICE
摘要 PROBLEM TO BE SOLVED: To generate a random number through simple hardware and to obtain superior periodicity by latching the output signal of a counter circuit when a composite signal outputted by a gate circuit rises or falls and outputting the numeral of the counter as a pseudo-random number value. SOLUTION: A clock generating means for latching generates different clocks L1 to Ln for latching which have clock pulse widths that are odd multiples of that of a reference clock and relatively prime. An (n)-bit counter 4 counts with (n)-bit width on the basis of a counter clock which has pulse width that is the same with the reference clock or optionally a power-raised multiple of a positive number. A gate circuit 1 puts the clocks for latching together in specific combination. An (n)-bit latch circuit 3 latches the output signal of the (n)-bit counter 4 when the composite signal outputted from the gate circuit 1 rises or fall and outputs the numeral of the counter as a pseudo-random number value.
申请公布号 JPH10320180(A) 申请公布日期 1998.12.04
申请号 JP19970129680 申请日期 1997.05.20
申请人 L II TEC:KK 发明人 IMAI NOBUMASA
分类号 A63F7/02;G06F7/58 主分类号 A63F7/02
代理机构 代理人
主权项
地址