发明名称 TRANSMITTER-RECEIVER OF SUPERHETERODYNE SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To provide a transmitter-receiver of superheterodyne system small in size and low in power consumption by using an oscillator in common. SOLUTION: A 2nd PLL circuit, a CPU clock oscillator and a DSP clock oscillator are eliminated from a conventional transmitter-receiver adopting the superheterodyne system. An output frequency of a reference oscillator 31 is fed to a mixer 8 as a 2nd local oscillating frequency, an output frequency from the reference oscillator 31 is frequency-divided by a frequency divider 32 and the resulting frequency is fed to a 1st PLL circuit 41, an output frequency of the 1st PLL circuit 41 and the output frequency of the reference oscillator 31 are mixed by a mixer 13 to produce a 1st local oscillating frequency, which is fed to a mixer 5 and a modulator 21, the output frequency of the reference oscillator 31 is frequency-divided at frequency dividers 33, 34, and the resulting frequencies are respectively used for a CPU clock frequency and a DSP clock frequency.</p>
申请公布号 JPH10322239(A) 申请公布日期 1998.12.04
申请号 JP19970141063 申请日期 1997.05.14
申请人 KYOCERA CORP 发明人 KANO HIDETO
分类号 H04B1/40;(IPC1-7):H04B1/40 主分类号 H04B1/40
代理机构 代理人
主权项
地址