发明名称 |
FRAME PHASE CONVERSION CIRCUIT, CROSS CONNECT DEVICE AND RECEIVER |
摘要 |
<p>PROBLEM TO BE SOLVED: To warrant time sequence between signals through a same transmission line by adopting a control method of a phase conversion buffer among plural signals in common, making a difference between a write address and a read address between buffers constant while no stuffing is made to the phase conversion buffer so as to transmit plural signals while keeping a frame phase difference. SOLUTION: A demultiplexer section 1 demultiplexes an STM-1 frame into three AU-32 and gives them to highways 32-34. A memory is divided into ES2-4 and buffers 11-13, and a clock signal is replaced in one memory. Then a phase comparator section 7 makes analog discrimination as to whether or not twice- reading or skipped reading of the ES to absorb wondering is to be executed, stuff bits are produced simultaneously in the AU-32#1-#3, stuffing is executed in post-stage buffers 11-13 and transmission is attained while arranging frame phases between the AU-32. Furthermore, independent frame phase conversion is attained for an input signal having an independent frame phase.</p> |
申请公布号 |
JPH10322300(A) |
申请公布日期 |
1998.12.04 |
申请号 |
JP19980100794 |
申请日期 |
1998.04.13 |
申请人 |
HITACHI LTD;NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
TAKATORI MASAHIRO;NAKANO YUKIO;ISHIDA KEIICHI;MORI TAKASHI;ASHI MASAHIRO;SUGANO TADAYUKI;UEDA HIROMI |
分类号 |
H04J3/00;H04J3/06;H04J3/07;H04L7/00;H04L12/28;(IPC1-7):H04J3/06 |
主分类号 |
H04J3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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