发明名称 PHASE-LOCKED LOOP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To suppress the increase in circuit cost and adjusting man-hours at the time of suppressing the fluctuation in circuit characteristics due to the temperature change in a PLL circuit. SOLUTION: This circuit is provided with a temperature sensor 9 for converting surrounding temperature into a voltage value, an A/D converter 10 for converting the output of the temperature sensor 9 into a digital signal, a memory 11 for storing compensation data corresponding to an address by using the output of the A/D converter 10 as this address, a D/A converter 12 for converting the output of the memory 11 into a voltage value, and a low-pass filter 13 for smoothing the rapid change of the output of the D/A converter 12 as a temperature compensation output generating means. In this case, an arithmetic amplifier 14 inputs the output of a phase comparator 1, which compares a phase difference between an input signal and the output of a frequency dividing circuit 4 which frequency-divides the output of a voltage control oscillator 3 and the output of the temperature compensation output generating means, calculates it, and applies it as a control input for the voltage control oscillator 3.
申请公布号 JPH10322198(A) 申请公布日期 1998.12.04
申请号 JP19970124070 申请日期 1997.05.14
申请人 NEC CORP 发明人 KOBAYASHI TOSHIAKI
分类号 H03L7/093;H03L7/099 主分类号 H03L7/093
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