发明名称 CONTINUOUS BYTE-STREAM ENCODER/DECODER USING FREQUENCY INCREASE AND CYCLIC REDUNDANCY CHECK
摘要 A continuous byte stream encoder/decoder process where a continuous stream of ATM data cells is received with a plurality of words, where each word has a plurality of bits in parallel. The ATM data cells are analyzed and new control words are created to convey information such as Start-of-Cell, parity, and synchronization signals for the serializer and deserializer chip set. These control words are combined with the data words of the ATM data cells to form a combined word stream. This word stream having a higher word transfer rate than the original ATM data cell. This combined word stream is fed back to a known 8B/10B encoder (7) which further modifies the data for proper transmission over an AC coupled serial path. Data from the 8B/10B encoder (7) is then serialized by a serializer (11), passed over the serial path (13) and then deserialized back into a recombined word stream by a deserializer (15). This recombined word stream is decoded with an 8B/10B and a frequency decreasing decoder (19) to restore the data to its original data cell format.
申请公布号 WO9854645(A1) 申请公布日期 1998.12.03
申请号 WO1998US11356 申请日期 1998.05.27
申请人 3COM CORPORATION 发明人 BENSON, MILES;KIMMITT, MYLES;ATER, DAN
分类号 G06F11/10;H04L1/00;H04L12/56;H04Q11/04;(IPC1-7):G06F11/00 主分类号 G06F11/10
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