METHOD AND APPARATUS FOR SELF-TESTING MULTI-PORT RAMS

摘要

It discloses novel BIST controller which detects single port faults and inter-port shorts in multi-port random access memories. The algorithm performs a conventional single-port test such as MARCH or SMARCH on one port of the memory and performs an inter-port test on all other ports. The algorithm does not impose any extra test time and requires the addition of only a few gates to a conventional single-port BIST controller, independently of the size of the memory.