Power-off screen clearing circuit for active matrix liquid crystal display

摘要

A liquid crystal display comprising gate lines (32) to which the gates of the transistors (31a) in active switching elements (31) are connected, a node A supplied with a gate low voltage Vgl generated from a source voltage Vdd, a charge storage means (36) for storing a predetermined charge, a P-channel transistor (37) connected between the node A and the charge storage means (36), a node C connected to the gate of the P-channel transistor (37), a voltage supply means (38) for supplying the node C with a voltage causing the P-channel transistor (37) to be maintained in a high-resistance state while the source voltage Vdd is supplied to the liquid crystal display, a voltage reducing means (39) for using a capacitive coupling to reduce the voltage of the node C to a voltage causing the P-channel transistor (37) to become a low-resistance state in response to the change in the source voltage Vdd if the supply of the source voltage Vdd is stopped, and a control means (33) for supplying the charge stored in the charge storage means (36) to the gate lines (32) through the node A in response to the P-channel transistor (37) having become a low-resistance state, thereby to cause the transistors (31a) in active switching elements (31) to become a low-resistance state. <IMAGE>