发明名称 Binaerer Informationsspeicher
摘要 869,069. Circuits of bi-stable magnetic elements. STANDARD TELEPHONES & CABLES Ltd. June 7, 1957 [June 14, 1956], No. 18399/56. Class 40 (9). [Also in Group XIX] In an intelligence store having a group or groups of storage cells, the cells of each group are selected sequentially and cyclically, intelligence from a selected cell being transferred to a temporary store and replaced by intelligence from a previously selected cell. As described, the " cells " are formed by holes in blocks of ferrite with "row" " and "column" wires threaded through. A column of storage cells 1, 2 . . . n . . . x - 1 are selected in turn by an access selector (not shown), each cell having a waveform applied thereto comprising a " read " pulse followed by a " half-write " pulse. Data may be entered at G6 as a series-mode train of " half-write " pulses in synchronism with those from the access selector. During the following cycle of the access selector each cell storing a " 1 " will be reset by a " read " pulse, thus producing an output pulse in the common column wire connected to a time-delay amplifier TB1; this pulse is stored in a bi-stable device MS1. During the next " read " pulse, a synchronized pulse at input e clears the store MS 1 for possible reception of a signal read-out from the next row, and the resulting output signal from MS1, after passing a further time-delay amplifier TB2 and a gate G5 (fed also by a " half-write " pulse at b), appears on the column wire as a " halfwrite " pulse in synchronism with the next " half-write " pulse from the access selector, thus re-entering the information into the storage column with a shift of one row position. However this shift is nullified by a corresponding shift of one step in the " home " position of the access selector. To provide for relative " left " and " right " shifts, further paths are provided in the feed-back circuit; the information signals may be fed back immediately through a gate G3 without being held in a storage element, or after further delay in a second bi-stable store MS2 via a time-delay amplifier TB3.
申请公布号 DE1185234(B) 申请公布日期 1965.01.14
申请号 DE1957I013361 申请日期 1957.06.14
申请人 INTERNATIONAL STANDARD ELECTRIC CORPORATION 发明人 WRIGHT ESMOND PHILIP GOODWIN;RIDLER DESMOND SIDNEY;ODELL ALEXANDER DOUGLAS
分类号 G11C11/06;G11C19/04 主分类号 G11C11/06
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