发明名称 |
Semiconductor substrate with SOI structure |
摘要 |
A semiconductor substrate which is optimum for a substrate for integrating a vertical power element and a control circuit element monolithically. A cavity 3 is formed between a dielectric layer 2 and a single crystal silicon substrate 4 in a control circuit element forming region 8, and junction planes 1a and 4a of single crystal silicon substrates 1 and 4 are joined together. Since bonding of regions where a vertical power element is formed is made with flat single crystal silicon planes, no void (non-bonded portion) is generated on the junction plane of the region where the vertical power element is formed. As a result, it is possible to realize a semiconductor device provided with perfect junction having electrical conductivity in a direction perpendicular to the junction interface.
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申请公布号 |
US5844294(A) |
申请公布日期 |
1998.12.01 |
申请号 |
US19960774424 |
申请日期 |
1996.12.30 |
申请人 |
NEC CORPORATION |
发明人 |
KIKUCHI, HIROAKI;ARAI, KENICHI |
分类号 |
H01L21/762;(IPC1-7):H01L27/01;H01L27/12;H01L29/00 |
主分类号 |
H01L21/762 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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