发明名称 |
Method for creating and using design shells for integrated circuit designs |
摘要 |
A method for creating a shell to represent a functional block of an IC design comprising of a plurality of interconnected functional blocks. The critical information from a synthesized gate level block is retained in the shell such that when analyzing the static characteristics of another block connected to the block now represented by the shell the analysis is still accurate. At a hierarchial level the present invention provides a method for analyzing the functional blocks of an IC design such that the memory requirement for storing the information of the functional blocks of the IC design is reduced as well as a decrease in run time.
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申请公布号 |
US5844818(A) |
申请公布日期 |
1998.12.01 |
申请号 |
US19960627823 |
申请日期 |
1996.05.10 |
申请人 |
LSI LOGIC CORPORATION |
发明人 |
KOCHPATCHARIN, DAN;SARKARI, ZARIR B.;JOLY, CHRISTIAN;WU, ALLEN |
分类号 |
H01L21/82;G06F17/50;(IPC1-7):G06F9/455 |
主分类号 |
H01L21/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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