| 摘要 |
A method of testing a circuit design is provided which allows for the comparison output of an abstract reference model of the circuit and the circuit itself to the same set of input stimuli. The circuit under test may operate in a manner which produces unpredictable events, results, or data. Due to the nature of the reference model, unpredictable results, data, or events are not allowed to occur. Thus to compare the outputs of the two as a means of verifying the circuit design, the testing method allows for a comparison analysis of the outputs despite the possibility of unpredictable data and events occurring on the circuit and not the model.
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