Differential flipflop circuit operating with a low voltage

摘要

In a flipflop circuit, each of master and slave latch/hold circuits is constituted of differential pairs consisting of transistors each connected between VCC and VSS without being in series with another transistor between VCC and VSS. A clock driving circuit has a pull-down function responding to a pair of complementary clocks so as to pull down the level of a pair of complementary data signals supplied to each latch/hold circuit. With this arrangement, the flipflop circuit composed of bipolar transistors can operate with a low voltage of not greater than 1 V.