Current mode interface circuitry for an IC test device

摘要

A test device for an integrated circuit utilizes current mode test signal shaping to evaluate circuit performance within at least one selected voltage swing. An interface circuit has an output line that is coupled to the integrated circuit under test. An upper voltage level (VOH) is established by a connection of the output line to a voltage source. The connection to the source includes a resistor. Parallel switchable current paths to a voltage level significantly less than VOH are also formed from the output line. In the preferred embodiment, the current paths are MOS transistors to electrical ground. The transistors in an "on" state act as current sinks that create a greater voltage drop across the resistor. Consequently, there is a correspondence between the number of transistors that are switched by input of a test signal and the difference between VOH and VOL. In the preferred embodiment, the interface circuit is used in the testing of a memory circuit, such as DRAM. Test sequences can be executed at different levels of VOH and VOL, thereby ensuring that the integrated circuit under test will operate properly under different potential conditions.