| 摘要 |
<p>A lateral MOS transistor is described, in particular, though not exclusively, a transistor of the lateral DMOS type, in which the drain is provided with a weakly doped drain extension (8) to increase the breakdown voltage. This drain extension is also present at the ends of the drain digits, so that the 'hard' drain (5) does not continue up to the edge (7) of the active region (6), but is separated therefrom by an interposed region. These regions do not contribute to the transistor effect. To reduce parasitic input capacitances, which correspond to these non-active regions, the gate poly (9) is provided in the active portion of the transistor only and is replaced in the non-active portions by poly (22) which is connected through to the source (4, 16). This poly acts as a gate which is permanently at 0 V, so that leakage currents in the non-active regions are prevented.</p> |
