SEMICONDUCTOR MEMORY FOR SECURE DATA STORAGE

摘要

A memory device includes a memory cell (102) whose data state is sensed by a sense amplifier (100). A balance amplifier (200) having the same construction as the sense amplifier is utilized to sense a balance cell (202) having the same construction as the memory cell. The balance cell is maintained in a erased (conductive) state. The balance cell is gated by the output of the sense amplifier. Such a device operates in a way to consume the same amount of power regardless of the data state of the memory cell. In one embodiment of the invention, a memory device consisting of a memory array includes a balance circuit associated with each of the sense amplifiers in the memory device. In another embodiment of the invention, a trim circuit (208) is used to adjust the conductivity of the balance circuit. This allows the balance circuit to be fine tuned during manufacture to compensate for process variations, thus allowing the balance circuit to be matched to the memory cells.