| 摘要 |
<p>A test head for an integrated circuit tester includes a horizontal base (46) holding a motherboard (44) having an array of daughterboards (50) mounted thereon, the daughterboards being radially distributed about a central vertical axis (64) of the motherboard. Each daughterboard holds a set of node cards (74) and includes data paths for forwarding the test instructions from the motherboard to the node cards. Each node card contains circuits for processing test signals to and from a separate terminal of a device under test (DUT). Edges (79) of the daughterboards extend downward through apertures (80) in the base to contact pads (82) on an interface board (40) holding the DUT to provide test and response signals extending between the node cards and pads on the DUT interface board further connected to terminals of the DUT.</p> |
