| 摘要 |
PROBLEM TO BE SOLVED: To share a circuit by switching the number of stages in a primary random walk filter, a secondary random walk filter and a Q-counter or the rate length of a rate multiplier in a DPLL circuit by a selector. SOLUTION: A primary random walk filter 5 up-counts the pulse of an advance phase being the output of a multilevel phase comparator 4, down-counts the pulse of a delay phase, divides the number of counting times into N1 and transmits a control pulse to a frequency-adjusting unit 1. The secondary random walk filter 6 similarly up/down-counts the control pulse of the filter 5 in the same way as the filter 5 and divides the difference of the number of counting times into N2. The Q counter 7 counts and stores the number of additional or removal pulses which are the output of the filter 6. When an interface unit is 2 M, the selector 10 selects '1' and selects '0' in the case of 1.5 M. Thus, it is not necessary to circuit-design by dividing the DPLL circuit into one for 2 M and another for 1.5M. |
