POWER SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a power semiconductor device which can prevent reduction in its reliability, even when cracks are developed in a protective film formed on a chip. SOLUTION: Gate terminals of a multiplicity of MOS FET cells formed on a chip 1 are commonly connected to a gate aluminum wiring line 3 by means of a gate polysilicon wiring line 2, while source terminals thereof are commonly connected with each other by a source aluminum wiring line 6. A region for formation of the gate polysilicon wiring line 2 is set under a source aluminum electrode formation region. The chip 1 is mounted to a substrate by a flip chip bonding process, and resin is filled into a gap between the chip 1 and the substrate. With such a structure, a crack developed in a passivation film 10 for protection of the surface of the chip 1 from the periphery of a bump electrode tends to extend beyond the source aluminum wiring line 6 into a depth wise direction, but the crack will not reach the gate polysilicon wiring line 2.