SEMICONDUCTOR MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a stable semiconductor memory device which is capable of writing data to the latch under a low power source voltage and reading data from the latch without destroying latch data. SOLUTION: Preset circuits 16, 17 which preset the connecting node ND14 of the first Y gate circuit 14, the second Y gate circuit 15 and the data bus line DB to the ground potential before reading data are installed. Therefore in the constitution where the gate electrode of the reading transistor RT0 is applied with the step-up voltage that compensates for the share of the threshold value of the transistor, the data destruction that latch data is switched from the low level to the high level through the reading transistor RT0 is prevented from being generated.