| 摘要 |
PROBLEM TO BE SOLVED: To generate clocks of higher accuracy than a serpentine of a groove, by generating a signal to be modulated by means of phase modulation, so that a period when a logic level rises is equal to a period when the logic level falls in an interval corresponding to an interval from a start to the center of each bit of serial data or from the center to an end of the bit. SOLUTION: A wobble data generation circuit 6 of a mastering device 1 sequentially generates wobble data blocks synchronously with the rotation of a disk matrix 2 and outputs the blocks as wobble data ADIP sequentially to a wobble signal generation circuit 7. A generation circuit 7A at the wobble signal generation circuit 7 generates and outputs a predetermined reference signal. The mastering device 1 controls a spindle motor 3 with the use of one reference signal generated at the generation circuit 7A, whereby a wobble signal WB synchronous with the rotation of the disk matrix 2 is generated. |
