发明名称 |
Apparatus and method of filtering a signal utilizing recursion and decimation |
摘要 |
Digital filter bank device that operates in a frequency-time hierarchically arranged, recursively fed back scheme based on the concept of decimation of a multi-speed-rate-operated system. The digital filter bank device operates in accordance with the computational requirement of summation of products for generating a filter output signal, and the computations are performed according to a software scheme based on a distributed arithmetic algorithm. The use of minimum hardware is enabled by a time-multiplexed scheme for both the implementation of the decimation and the distributed arithmetic principles of signal processing. The use of such a digital filter bank device results in a digital filter hardware architecture that has a significantly reduced semiconductor device die surface area.
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申请公布号 |
US5841681(A) |
申请公布日期 |
1998.11.24 |
申请号 |
US19960679430 |
申请日期 |
1996.07.08 |
申请人 |
UNITED MICROELECTRONICS CORPORATION |
发明人 |
CHEN, YUNG-LUNG;TAI, CHIAO-YEN;JEN, CHEIN-WEI;LEE, HWAN-REI |
分类号 |
H03H17/02;(IPC1-7):G06F17/10;G01R23/167 |
主分类号 |
H03H17/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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