| 摘要 |
Logical simulation result data is obtained from performing a logical simulation operation on a logical circuit to be tested. The logical simulation result data is then examined and thus a test point is obtained for a DC parametric test in which direct-current characteristics of the logical circuit are tested. The logical simulation result data indicates input logical signal levels applied to input terminals and output logical signal levels appearing at output terminals in response to application of the input logical signal levels to the input terminals, and further indicates how the input logical signal levels and output logical signal levels vary as time progresses. It is determined whether or not a desired logical signal level is held at a predetermined circuit terminal of the input terminals and output terminals for a predetermined level maintenance time period in the logical simulation result data. |
