| 摘要 |
A memory cell of an SRAM includes an access transistor, and an MIS switching diode. The access transistor has a drain electrode connected to a bit line of a corresponding column, a source electrode connected to a storage node, and a gate electrode connected to a word line of a corresponding row. The threshold voltage of the access transistor is small than the threshold voltage of a bit line load transistor. The MIS switching diode is connected between the storage node and a second power supply potential node. The switching initiate voltage of the MIS switching diode is greater than the difference between the first potential and the threshold voltage of the bit line load transistor, and smaller than the difference between the first potential and the threshold voltage of the access transistor. Thus, data can be read/written and held accurately.
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