发明名称 MEMORY INITIALIZATION CONTROL SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To eliminate the necessity of initializing processing of contents stored in a memory at the time of starting the system or starting various processing. SOLUTION: When normal data are written in a required address of a DRAM 202, a circuit 204 sets up the value of a guarantee bit data stored in an address of a DRAM 203 corresponding to the required address of the DRAM 202 to a value indicating a written state. Since guarantee bit data stored in respective addresses of the DRAM 203 are surely set up to '000' or '111' immediately after turning on a power supply, the value indicating the written state is set up to a value other than these values '000' and '111'. When the value of the guarantee bit data stored in the address of the DRAM 203 corresponding to the required address of the DRAM 202 indicates the written state in the case of reading out normal data from the required address of the DRAM 202 thereafter, the normal data read out from the DRAM 202 are outputted to a data bus 207, and in the other case, a fixed value '0' is outputted to the data bus 207 as read data.</p>
申请公布号 JPH10307762(A) 申请公布日期 1998.11.17
申请号 JP19970114508 申请日期 1997.05.02
申请人 FUJITSU LTD 发明人 YAMAZAKI NAOKI
分类号 G06F12/16;G06F1/24;G06F12/00;G11C11/4072;(IPC1-7):G06F12/16 主分类号 G06F12/16
代理机构 代理人
主权项
地址