| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the delay o a phase basis, by computing the phase basis and an added phase based on an input phase from a position detecting section which detects the position of a train, and outputting a computed result based on the added phase and the preceding output phase basis to a converter as an output phase basis in accordance with the presence/absence of the variation of the phase basis. SOLUTION: A first arithmetic processing section 1 computes a phase basis 'θout 1' and an added phase 'sθadd' by using an input phase 'θin' based on the position of a train. A second arithmetic processing section 2 compotes an output phase basis 'θout 2' by means of an output phase basis computing section 12 based the phase basis 'θout 1' and added phase 'θadd'. Then, an output phase basis correcting section 13 sets a value obtained by multiplying the output phase basis 'θout 2' when the phase basis 'θout 1' does not vary, or the added phase 'θadd' when the phase basis 'θout 1' varies by 1/2 and adding the product to the phase basis 'θout 1' as the output phase basis 'θout 3' to a converter. Therefore, the delay of the output phase basis 'θout 3' from the phase basis '# out 1' due to the operating time lag between the first and the second arithmetic processing sections 1 and 2 becomes '0' on an average.</p> |
