发明名称 METHOD AND SYSTEM FOR EXCLUDING CACHE
摘要 PROBLEM TO BE SOLVED: To obtain an improved cache for the processor in a computer system by introducing randomness of certain level selectively in substitution algorithm and excluding a cache block according to the substitution algorithm. SOLUTION: The cache 60 includes a cache entry array 62 having various values, a cache directory 64 for tracing entries, and a substitution controller 66 which uses LRU algorithm altered selectively with a random number. Then when slight randomness is desirable, small randomness is introduced in a 2nd deformation example 70 and the substitution algorithm is altered. In a final modification example 74, no LRU bit is used and a block excluded in an 8- member class is completely selected with three random bits. Therefore, this is applicable to a single-processor computer system and a multiprocessor computer system.
申请公布号 JPH10307756(A) 申请公布日期 1998.11.17
申请号 JP19980078873 申请日期 1998.03.26
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 RAVI KUMAR ARIMIRI;LEO JAMES CLARK;JOHN STEPHEN DODDSON;JERRY DON LEWIS
分类号 G06F12/08;G06F12/12 主分类号 G06F12/08
代理机构 代理人
主权项
地址