发明名称
摘要 A transmitter comprising at least first and second phase related signal paths, respective frequency up-converters, a combiner for combining the output of the respective frequency up-converters and for supplying the combined signal to a power amplifier. A feedback loop is provided which has a coupler for deriving a portion of the power amplifier output signal and supplying it to first and second phase related feedback paths. Each of the feedback paths comprises frequency down-converters. The dc offset is measured at the respective inputs of the frequency up-converters when the feedback around the linearization loop is reduced to zero without altering the dc offsets produced at the outputs of the frequency down-converters. Subtractors subtract the measured dc offsets from the feedback loop error signals.
申请公布号 JPH10512133(A) 申请公布日期 1998.11.17
申请号 JP19970516440 申请日期 1996.10.22
申请人 发明人
分类号 H03M1/10;H03C1/06;H03C1/52;H03C3/40;H04B1/04;H04B1/30;H04B1/40;H04L27/20;(IPC1-7):H04L27/20 主分类号 H03M1/10
代理机构 代理人
主权项
地址