发明名称 RESISTANCE GENERATING CIRCUIT LAYOUT
摘要 PROBLEM TO BE SOLVED: Not only to enable a resistance generating circuit to operate linearly as much as possible but also to restrain a diode which operates like a capacitor from being formed in a bulk region by a method wherein a diode is prevented from being formed between the source and bulk region of a MOS transistor, and a direct current voltage is made to overlap additionally with a bulk signal. SOLUTION: The voltage of a second terminal of a circuit layout is applied, for instance, to the source electrode 4 of a first PMOS transistor 1. The voltage is amplified as high as a potential difference across the base-emitter junction of a PNP transistor and then supplied to the bulk electrode 11 of a first transistor. Therefore, signals identical to those of the source electrode 4 and amplified by a potential difference across the base-emitter diode junction of a PNP transistor in a means 10 are applied to the bulk electrode 11 of the first transistor 1. Therefore, even if signals outputted through a terminal 6 are changed, the potential difference is obtained between the source and bulk terminal of the first transistor 1, and a capacitive diode is stopped from being formed between the source electrode 4 and the bulk region.
申请公布号 JPH10308456(A) 申请公布日期 1998.11.17
申请号 JP19980111609 申请日期 1998.04.22
申请人 KONINKL PHILIPS ELECTRON NV 发明人 BERG MICHAEL;GEHRT HOLGER
分类号 H01L21/8234;H01L27/02;H01L27/06;H03H11/24;H03H11/46;(IPC1-7):H01L21/823 主分类号 H01L21/8234
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