| 摘要 |
An improved method for forming a dynamic random access memory (DRAM) capacitor with increased capacitance includes depositing a first oxide layer over a substrate, and patterning a first photoresist layer on the first oxide layer, thereby defining a node contact area. A node trench is etched in the first oxide layer using the first photoresist as a mask. Afterwards, a polysilicon layer is deposited on the first oxide layer, and a second photoresist layer is patterned on this polysilicon layer, defining an electrode area. A hemispherical-grain (HSG) polysilicon layer is deposited on the polysilicon layer and the first oxide layer. The HSG polysilicon layer is then etched back to form a HSG spacer on the sidewalls of the polysilicon layer, and to form a large number of micro-grooves in the upper portion of the polysilicon layer corresponding to the HSG topography of the HSG polysilicon layer. A nitride layer is then conformally deposited to line the micro-grooves. A second oxide layer is then deposited on the nitride layer, filling the nitride-lined micro-grooves with oxide. The second oxide layer is then anisotropically etched back, leaving a nitride/oxide fill in the micro-grooves. The polysilicon layer is then anisotropically etched using the nitride/oxide fill as an etching mask, thereby forming a large number of closely packed narrow trenches in the polysilicon layer. The second oxide layer and the silicon nitride layer are then removed.
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