发明名称 |
Single-instruction-multiple-data processing using multiple banks of vector registers |
摘要 |
A vector processor includes two banks of vector registers where each vector register can stored multiple data elements and a control register with a field indicating a default bank. An instruction set for the vector processor includes instructions which use a register number to identify a vector registers in the default bank, uses a register number to identify a double-size vector register including a register from the first bank and a register from the second bank, and instructions which include a bank bit and a register number to access a vector register from either bank.
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申请公布号 |
US5838984(A) |
申请公布日期 |
1998.11.17 |
申请号 |
US19960697086 |
申请日期 |
1996.08.19 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
NGUYEN, LE TRONG;SONG, SEUNGYOON PETER;MOHAMED, MOATAZ A.;PARK, HEONCHUL;WONG, RONEY SAU DON |
分类号 |
G06F17/16;G06F9/30;G06F9/318;G06F12/00;G06F15/16;G06F15/78;(IPC1-7):G06F9/30 |
主分类号 |
G06F17/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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