发明名称 BUS CONNECTING DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To set an insertion order of a function block as optional, to reduce the number of signal lines of a bus and to make a device compact. SOLUTION: In the case that a function block 40 is inserted into a bus at a state that a function block 50 is mounted, when power supply voltage of the function block 40 is determined, a bus clock CK is started to be supplied from a clock supplying circuit 41. A fact that clock interruption lasts until the clock CK is normally supplied by the circuit 41 is detected and a clock interruption reset signal S51 is turned on by a clock interruption detecting circuit 51. The signal S51 is turned off after a fixed period from the clock CK is judged to be normally inputted by the circuit 51. Consequently, an interface circuit 54 is normally reset by a fact that an internal reset signal is turned on while the clock CK is supplied and communication with a serial bus 30 is normally performed when the signal S52 is turned off.</p>
申请公布号 JPH10303942(A) 申请公布日期 1998.11.13
申请号 JP19970112513 申请日期 1997.04.30
申请人 OKI ELECTRIC IND CO LTD;NIPPON TELEGR & TELEPH CORP <NTT> 发明人 TAWARA TAMOTSU;NAKANO NAOKI;IWAMURA KEIJI;AOKI MICHIHIRO;OKADA KATSUYUKI;KATAOKA SHINSUKE
分类号 G06F1/24;G06F13/38;H04L12/40;(IPC1-7):H04L12/40 主分类号 G06F1/24
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