| 摘要 |
PROBLEM TO BE SOLVED: To make a front end compact by selecting either a demodulation and error correcting means corresponding to QPSK modulation or a demodulation and error correction means corresponding to 8PSK modulation, and outputting a demodulated signal and a clock regeneration signal. SOLUTION: An I signal and a Q signal which are outputs of an orthogonal detection means 12 are converted by an A/D converter 26, and carrier reproduction is performed by a digital demodulator 27 in common use for QPSK/8PSK and clock reproduction is performed by a clock regeneration means 29. Error correction or de-interleaving of the demodulated output is performed by an FEC means 28 in common use for QPSK/8PSK, and an error-corrected demodulated output 118 and a clock signal 119 are outputted. An AGC voltage is inputted to the control terminal of a detection means 12 for controlling the amplitude of the I signal and the Q signal being the output of the orthogonal detection means 12. The QPSK and 8PSK demodulation or error correction is selected and processed by the demodulating means 27 and the FEC means 28 according to the result of a modulation system decision means 33 or the information of a modulation system included in the demodulated output. |
