| 摘要 |
In a semiconductor integrated circuit device wherein a BiCMOS logical gate circuit and a CMOS logical gate circuit are used in combination, a lower power consumption than that of CMOS and a higher integration density than that of CMOS are realized without sacrificing the operating speed. The BiCMOS semiconductor integrated circuit device of the present invention is realized by logical function macros using the output portion, of logical function realized by a CMOS gate constituted by an MOS transistor having a gate width determined by the minimum value in the design criteria, as a BiCMOS buffer having a very small input capacity. In the BiCMOS buffer, the gate width of the MOS transistor, wherein a gate is connected to the input terminal, is set at a small value by incorporation of a base potential clamp circuit or the like. <IMAGE> |
