| 摘要 |
<p>A semiconductor integrated circuit device having a system-on-chip structure in which a DRAM and a logic integrated circuit are mixedly provided, silicide layers are formed on the surfaces of the source and drain of a MISFET constituting the direct peripheral circuit of the DRAM, the source and drain of a second MISFET constituting the indirect peripheral circuit of the DRAM, and the source and drain of a third MISFET constituting the logic integrated circuit, and no silicide layer is formed on the surfaces of the source and drain of a memory cell selecting MISFET constituting the memory cell of the DRAM.</p> |
