Gated-clock registers for low-power circuitry

摘要

A method and apparatus for analyzing each microinstruction in a microinstruction-based electronic circuit having a plurality of registers to determine which registers in a processing cycle are not involved in the processing cycle, and preventing those registers from being clocked during such processing cycle. Hence, inactive registers during a processing cycle do not consume power at the level of active registers, thus lowering overall power usage by any system employing such gated-clock registers.