发明名称 |
EDRAM with integrated generation and control of write enable and column latch signals and method for making same |
摘要 |
An EDRAM device includes an EDRAM memory array on a semiconductor chip. A row enable signal generator and a column address latch signal generator are provided on the same semiconductor chip for generating row enable and column address latch signals for application to the EDRAM memory array.
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申请公布号 |
US5835442(A) |
申请公布日期 |
1998.11.10 |
申请号 |
US19960620450 |
申请日期 |
1996.03.22 |
申请人 |
ENHANCED MEMORY SYSTEMS, INC. |
发明人 |
JOSEPH, JAMES DEAN;HEISLER, DION NICKOLAS;HEISLER, DOYLE JAMES |
分类号 |
G06F12/08;G11C7/10;G11C11/00;(IPC1-7):G11C8/00 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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