| 摘要 |
The output of a voltage-controlled oscillator (VCO), after being passed through a resonator having a single-peak characteristic, is detected by a detector. The output of the detector is sampled and held at a time instant that the control input voltage to the VCO reaches a maximum and also at a time instant that it reaches a minimum, and the difference between them is fed back to the control input of the VCO. In this way, the center frequency of the VCO is controlled so that it becomes equal to the center frequency of the resonator. In the case of a VCO as an FM modulator in an FM-CW radar, the sample-and-hold timing is derived from a clock signal based on which a triangle wave is generated. In the case of a VCO as an FSK modulator, the sample-and-hold timing is obtained by detecting a 0 and a 1 in input data.
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