发明名称 |
Single bank, multiple way cache memory |
摘要 |
In a microcomputer system implementing cache memory, a multiple-way cache is implemented in a single-bank memory. Instead of using chip output enables on a separate physical chip for each way of the multiple-way cache, an address line of a single bank of memory is used to select between ways. In this way, fewer parts can be used, and a single-bank memory can be used for a multiple-way cache.
|
申请公布号 |
US5835948(A) |
申请公布日期 |
1998.11.10 |
申请号 |
US19940324016 |
申请日期 |
1994.10.14 |
申请人 |
COMPAQ COMPUTER CORPORATION |
发明人 |
OLARIG, SOMPONG P.;RAMSEY, JENS K.;COLLINS, MICHAEL J. |
分类号 |
G06F12/08;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|