发明名称 Memory system with write buffer, prefetch and internal caches
摘要 A statistically fast, high performance computer memory system including a system memory for storing code and non-code data accessible by at least two bus masters, a bus connecting the memory with the bus masters, and a plurality of caches connected to the bus. An internal cache holds data selected solely on the basis of memory accesses by the host processor, a pre-fetch cache pre-fetches code from the memory, and a write buffer cache connected to the bus for buffering data written to the memory.
申请公布号 US5835945(A) 申请公布日期 1998.11.10
申请号 US19900563216 申请日期 1990.08.06
申请人 NCR CORPORATION 发明人 KING, EDWARD C.;ELLIS, JACKSON L.;MOUSSAVI, ROBERT B.;WEISSER, PIRMIN L.;VERMEER FULPS V
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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