发明名称 Structure and method for providing reconfigurable emulation circuit
摘要 A method and a structure provide emulation circuit implemented on a logic block module comprising clocked and unclocked field programmable logic devices (FPGAs). Software modules analyze the target logic circuit and impose delay constraints to require certain storage instances to be implemented on separate FPGAs so as to prevent hold time violation artifacts.
申请公布号 US5835751(A) 申请公布日期 1998.11.10
申请号 US19970893412 申请日期 1997.07.11
申请人 QUICKTURN DESIGN SYSTEMS, INC. 发明人 CHEN, NANG-PING;KO, ROBERT J.;LI, JEONG-TYNG;HUANG, THOMAS B.;WANG, MING-YANG
分类号 G06F1/10;A21B1/24;F24C15/32;G06F1/12;G06F11/26;G06F17/50;H01L21/82;H03K19/177;(IPC1-7):G06F9/44 主分类号 G06F1/10
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