MEMORY ACCESS PROTECTION

摘要

The present invention provides a data processing apparatus for controlling access to a memory having a plurality of memory locations for storing data values, each memory location having a corresponding address. The apparatus comprises address range storage for storing information identifying address ranges for a plurality of logical regions within said memory, and attribute storage for storing, for each logical region, attributes used to control access to memory locations within said logical region. In accordance with preferred embodiments, one or more of these logical regions may overlap with one another. Further, address comparator logic is provided for comparing an address issued by a processor corresponding to one of said memory locations with the address ranges for said plurality of logical regions, and, if one or more of the logical regions contains said address, for generating a signal indicating those logical regions containing said address. Attribute determination logic, responsive to the signal generated by the address comparator logic, is then used to apply predetermined priority criteria to determine which logical region containing said address has the highest priority, whereby the attributes in the attribute storage corresponding to that highest priority region are used for controlling access to the memory location specified by the address. In accordance with the present invention, overlapping logical regions may be defined, and relative priorities assigned to each logical region. If the processor specifies an address which falls within two or more logical regions, then the priority criteria are used to determine which logical region has the highest priority. Each logical region will have a number of attributesspecified for that region which are used to control the access to the memory locations within that logical region. Based on the determination of which region has the highest priority, the attributes for that high priority region are then used to control the access to the specific memory location specified by the processor.